DD&T Blending ASIC

DD&T
Digital Design & Technology
Gesellschaft für Hard- und
Software Entwicklung mbH

Electrical Engineering & IT Design Services

Basic Features of the Blending ASIC

Z-Buffering
Wide range of implemented antialiasing algorithms from simple but fast on the fly blending, up to neighbour averaging.
GL/OpenGL compatible blending
Basic transparency handling (in Z-buffer quality or partly antialiased)
Fog mechanism
Accumulation Buffer and Multipass support.
Fast feedback and feedthrough mechanism of pixel data to and from the system CPU with help of an internal bypass

Some completely new blending techniques are implemented in the Blending ASIC. E.g. for antialiasing z-dependent blending is used (selection of the blending equations in dependency of the pixel z-values).

Target System Architecture

The Blending ASIC can be used in conjunction with every scanconversion unit which is able to produce correct subpixel masks or alpha values. It can also be used as a simple Z-Buffer chip or Accumulation Buffer chip on almost every 3D graphics board.
Normally the Blending ASIC will be used for blending a pixel fragment coming from the rasterizer with a stored fragment in the Frame Buffer. But it is also possible with help of some external logic to blend a synthetic image with an external video source.

For more information, contact ddt@dd-t.com, or call (+49) 7121 43308-10